While competitors scramble for scraps of compute, Nvidia is running two parallel roadmaps and might scrap one entirely.
The Summary
- Nvidia's Rubin Ultra platform will pack 768GB of HBM4E memory, a massive jump aimed at training the next generation of AI models without memory bottlenecks
- The 2028 Feynman platform may get redesigned or delayed due to manufacturing constraints, potentially reshuffling the competitive landscape
- Kyber, scheduled for 2027, remains on track while Feynman faces uncertainty
The Signal
Nvidia is pushing memory capacity harder than any competitor. The Rubin Ultra platform's 768GB of HBM4E represents more than doubling current high-end configurations. This isn't incremental. For context, most current flagship AI training chips max out around 192GB to 288GB. The jump to 768GB means models that currently require multi-chip parallelism could run on a single accelerator.
That matters because memory bandwidth, not raw compute, is the actual bottleneck for transformer models above a certain parameter count. You can have all the FLOPS in the world, but if you're waiting on memory fetches, you're just burning power. More memory per chip means fewer interconnects, lower latency, simpler orchestration.
"The strategic memory upgrade enhances AI model training efficiency, positioning Nvidia competitively amid potential supply constraints."
But there's tension in the roadmap. Feynman, the 2028 platform, is hitting manufacturing constraints that could force a redesign. This is the platform that was supposed to leapfrog Rubin and Kyber. If Nvidia has to rearchitect Feynman, it suggests the original spec was either too ambitious for fab capabilities or facing supply chain realities that even Nvidia can't muscle through.
The smart move here is Nvidia running parallel tracks. Kyber stays on schedule for 2027. Rubin Ultra, with its massive memory jump, ships when it ships. Feynman becomes the wildcard. If manufacturing catches up, great. If not, Nvidia has already de-risked its near-term roadmap.
Key tactical details:
- HBM4E is next-gen high-bandwidth memory, not yet in production at scale
- 768GB configurations require coordination with memory suppliers still ramping HBM4
- Manufacturing constraints on Feynman likely involve advanced packaging, not just node shrinks
This isn't just Nvidia managing chip releases. It's Nvidia managing the entire AI infrastructure stack's expectations. Hyperscalers planning 2027-2028 buildouts need to know what's real and what's speculative. A firm Kyber date with known specs lets them design around certainty. Feynman's uncertainty becomes a bonus if it lands, not a dependency.
The Implication
If you're building agent infrastructure, plan around Kyber and Rubin specs, not Feynman. The memory jump alone changes economics for large model deployments. Single-chip training runs that used to require distributed setups mean simpler code, fewer failure points, faster iteration cycles.
Watch how competitors respond. If Nvidia is hitting manufacturing limits, AMD and custom silicon shops are hitting them harder. The gap might widen before it narrows.